1. Field of the Invention
The present invention relates to a flat panel display, and more particularly, to a full color flat panel display.
2. Description of the Related Art
Flat panel displays are noted as substitutes for cathode ray tube displays because of their light weight, thin structure, and better image quality. Examples of the flat panel display include liquid crystal displays (LCD) and organic light emitting displays (OLED). As compared with the LCD, the OLED has superior brightness and viewing angle and does not require a backlight, which gives the OLED an advantage in realizing a thin display.
Flat panel displays include red, green, and blue pixels for realizing a full color display. The red, green, and blue pixels may be formed in an array with a stripe arrangement, a mosaic arrangement, or a delta arrangement. As compared with the stripe arrangement, both the delta arrangement and the mosaic arrangement are superior in color mixture of three primary colors to achieve different hues and thus more suitable for displaying moving pictures. An OLED having a pixel array with a delta arrangement has been disclosed in U.S. Pat. No. 6,429,599.
FIG. 1 is a plan view of an OLED having a pixel array with the delta arrangement, disclosed in the forgoing U.S. patent. In this figure, red (R), green (G), and blue (B) pixels are arranged in the delta arrangement. In an array with the stripe arrangement, the pixels of adjacent rows line up so that all the R pixels are along the same columns, all the G pixels are along the same columns, and all the B pixels are along the same columns. On the other hand, in the delta arrangement, the pixels along adjacent rows are staggered so that the B pixel of one row forms triangles, or deltas, with the R and G pixels of its two adjacent rows. Each of the R, G, and B pixels includes a first thin film transistor (TFT) 4, a capacitor 5, a second TFT 6, and a pixel electrode 7 of a light emitting diode. Further, a data line 1 and a gate line 3 are coupled to the first TFT 4, and a power line 2 is coupled to the second TFT 6.
As described above, in a delta arrangement, each of the R, G, and B pixels of one row is located adjacent to the other two color pixels of an adjacent row creating a zigzag path from one pixel to the pixel of the same color in an adjacent column. The data line 1 extending in a general column direction, is coupled to the first TFT 4 of pixels of the same color along this zigzag path. The zigzag path increases the resistance of the data line 1 and may delay a data signal. Moreover, the power line 2 also extends along a zigzag path. Hence, the resistance of the power line 2 is also increased that may cause a voltage drop along the line. The delay of the data signal along the data line 1 and the voltage drop along the power line 2 may deteriorate picture quality, which is emerging as a serious problem as the size of the displays increases. Further, such a complicated interconnection layout increases the spaces occupied by the interconnections resulting in a decrease in the aperture ratio.